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 INTEGRATED CIRCUITS
74LV123 Dual retriggerable monostable multivibrator with reset
Product specification Supersedes data of 1997 Feb 04 IC24 Data Handbook 1998 Apr 20
Philips Semiconductors
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
FEATURES
* Optimized for Low Voltage applications: 1.0 to 5.5V * Accepts TTL input levels between VCC = 2.7V and VCC = 3.6V * Typical VOLP (output ground bounce) t 0.8V @ VCC = 3.3V, * Typical VOHV (output VOH undershoot) u 2V @ VCC = 3.3V, * DC triggered from active HIGH or active LOW inputs * Retriggerable for very long pulses up to 100% duty factor * Direct reset terminates output pulses * Schmitt-trigger action on all inputs except for the reset input * Output capability: standard (except for nREXT/CEXT) * ICC category: MSI
Tamb = 25C Tamb = 25C
DESCRIPTION
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC/HCT123. The 74LV123 is a dual retriggerable monostable multivibrator with output pulse width control by three methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). They are normally connected as shown in Figure 1. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively, an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering. Figures 1 and 2 illustrate pulse control by retriggering and early reset. The basic output pulse width is essentially determined by the values of the external timing components REXT and CEXT. For pulse width when CEXT <10000pF, see Figure 5. When CEXT u 10,000pF, the typical output pulse width is defined as: tW = 0.45 REXT CEXT (typ.), where tW = pulse width in ns; REXT = external resistor in K; and CEXT = external capacitor in pF. Schmitt-trigger action in the nA and nB inputs makes the circuit highly tolerant of slower input rise and fall times.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25C; tr = tf v2.5 ns SYMBOL PARAMETER Propagation delay nA, nB to nQ, nQ nRD to nQ, nQ Input capacitance Power dissipation capacitance per monostable VCC = 3.3V, VI = GND to VCC1 CONDITIONS CL = 15pF VCC = 3.3V REXT = 5K CEXT = 0pF TYPICAL UNIT
tPHL/tPLH CI CPD
25 20 3.5 60
ns ns pF pF
NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W) VCC2 fi )S (CL VCC2 fo) where: PD = CPD fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; VCC2 fo) = sum of the outputs. S (CL
ORDERING INFORMATION
PACKAGES 16-Pin Plastic DIL 16-Pin Plastic SO 16-Pin Plastic SSOP Type II 16-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +125C -40C to +125C -40C to +125C -40C to +125C OUTSIDE NORTH AMERICA 74LV123 N 74LV123 D 74LV123 DB 74LV123 PW NORTH AMERICA 74LV123 N 74LV123 D 74LV123 DB 74LV123PW DH PKG. DWG. # SOT38-1 SOT109-1 SOT338-1 SOT403-1
1998 Apr 28
2
853-1911 19290
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
PIN CONFIGURATION
1A 1B 1RD 1Q 2Q 2CEXT 2REXT/CEXT GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC 1REXT/CEXT 1CEXT 1Q 2Q 2RD 2B 2A
LOGIC SYMBOL
1CEXT 2CEXT 1REXT/CEXT 2REXT/CEXT 14 6 15 7
S
1Q Q 1 9 2 1A 2A 1B 2B T Q 1Q 2Q 2Q
13 5
SV00096
4 12
PIN DESCRIPTION
PIN NUMBER 1,9 2,10 3,11 4, 12 7 8 13, 5 14, 6 15 16 SYMBOL 1A, 2A 1B, 2B 1RD, 2RD 1Q, 2Q 2REXT/CEXT GND 1Q, 2Q 1CEXT, 2CEXT 1REXT/CEXT VCC FUNCTION Trigger inputs (negative-edge triggered) Trigger inputs (positive-edge triggered) Direct reset LOW and trigger action at positive edge Outputs (active LOW) External resistor/capacitor connection Ground (0V) Outputs (active HIGH) External capacitor connection External resistor/capacitor connection Positive supply voltage
10
RD
3 11
1RD 2RD
SV00097
FUNCTIONAL DIAGRAM
1CEXT 2CEXT 1REXT/CEXT 2REXT/CEXT 14 6 15 7
S
1Q Q 2Q
13 5
LOGIC SYMBOL (IEEE/IEC)
14 15 1 2 4 CX RCX 13 &
1 9 2 10
1A 2A 1B 2B T Q 1Q 2Q 4 12
RD
3 3 R 11
1RD 2RD
6 7 9 10
SV00099
CX RCX 5 &
12 11
R
SV00098
1998 Apr 28
3
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
LOGIC DIAGRAM
nREXT/CEXT VCC
RD
Q
Q R R CL VCC CL
VCC R
CL
CL A
CL
B
R
It is recommended that Pin 6 (2CEXT) and Pin 14 (1CEXT) by externally grounded to Pin 8 (GND)
SV00100
FUNCTION TABLE
INPUTS nRD L X X H H nA X H X L L nB X X L H H
CEXT
OUTPUTS nQ L L* L* nQ H H* H*
VCC
REXT
NOTES: * If the monostable was triggered before this condition was established, the pulse will continue as programmed. H = HIGH voltage level L = LOW voltage level X = don't care = LOW-to-HIGH transition = HIGH-to-LOW transition = one HIGH level output pulse = one LOW level output pulse
to nCEXT (pin 14 or 6)
to nREXT/CEXT (pin 15 or 7)
SV00101
Figure 1.Timing component connection
1998 Apr 28
4
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
RECOMMENDED OPERATING CONDITIONS
SYMBOL VCC VI VO Tamb PARAMETER DC supply voltage Input voltage Output voltage Operating ambient temperature range in free air Input rise and fall times except for Schmitt-trigger inputs See DC and AC characteristics VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V CONDITIONS See Note1 MIN 1.0 0 0 -40 -40 - - - - - - - - TYP 3.3 - - MAX 5.5 VCC VCC +85 +125 500 200 100 50 UNIT V V V C
tr, tf
ns/V
NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V.
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0V). SYMBOL VCC "IIK "IOK "IO "IGND, "ICC Tstg PARAMETER DC supply voltage DC input diode current DC output diode current DC output source or sink current - standard outputs DC VCC or GND current for types with - standard outputs Storage temperature range Power dissipation per package - plastic DIL - plastic mini-pack (SO) - plastic shrink mini-pack (SSOP and TSSOP) for temperature range: -40 to +125C above +70C derate linearly with 12 mW/K above +70C derate linearly with 8 mW/K above +60C derate linearly with 5.5 mW/K VI < -0.5 or VI > VCC + 0.5V VO < -0.5 or VO > VCC + 0.5V -0.5V < VO < VCC + 0.5V CONDITIONS RATING -0.5 to +7.0 20 50 25 UNIT V mA mA mA
50 -65 to +150 750 500 500
mA C
PTOT
mW
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Apr 28
5
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS MIN VCC = 1.2V VIH HIGH level Input voltage VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5V VCC = 1.2V VIL LOW level Input voltage VCC = 2.0V VCC = 2.7 to 3.6V VCC = 4.5 to 5.5 VCC = 1.2V; VI = VIH or VIL; -IO = 100A VCC = 2.0V; VI = VIH or VIL; -IO = 100A VOH HIGH l level output ltt voltage out uts voltage; all outputs VCC = 2.7V; VI = VIH or VIL; -IO = 100A VCC = 3.0V; VI = VIH or VIL; -IO = 100A VCC = 4.5V; VI = VIH or VIL; -IO = 100A VO OH HIGH level output voltage; g STANDARD outputs VCC = 3.0V; VI = VIH or VIL; -IO = 6mA VCC = 4.5V; VI = VIH or VIL; -IO = 12mA VCC = 1.2V; VI = VIH or VIL; IO = 100A VCC = 2.0V; VI = VIH or VIL; IO = 100A VOL LOW l ltt level output voltage out uts voltage; all outputs VCC = 2.7V; VI = VIH or VIL; IO = 100A VCC = 3.0V; VI = VIH or VIL; IO = 100A VCC = 4.5V; VI = VIH or VIL; IO = 100A VO OL LOW level output voltage; g STANDARD outputs Input leakage current Quiescent supply current; MSI Additional quiescent supply current VCC = 3.0V; VI = VIH or VIL; IO = 6mA VCC = 4.5V; VI = VIH or VIL; IO = 12mA VCC = 5.5V; VI = VCC or GND VCC = 5.5V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC - 0.6V 1.8 2.5 2.8 4.3 2.40 3.60 1.2 2.0 2.7 3.0 4.5 2.82 4.20 0 0 0 0 0 0.25 0.35 0.2 0.2 0.2 0.2 0.40 0.55 1.0 20.0 500 0.2 0.2 0.2 0.2 0.50 V 0.65 1.0 160 850 A A A V 1.8 2.5 2.8 4.3 2.20 V 3.50 V 0.9 1.4 2.0 0.7II ICC ICC
NOTES: 1. All typical values are measured at Tamb = 25C.
1998 Apr 28
6
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
AC CHARACTERISTICS
GND = 0V; tr = tf 2.5ns; CL = 50pF; RL =1 K SYMBOL PARAMETER WAVEFORM CONDITION VCC(V) 1.2 tPHL Propagation delay nRD, nA, nB, to nQ Figure 3 CEXT = 0pF REXT = 5K 2.0 2.7 3.0 to 3.6 4.5 to 5.5 1.2 tPLH Propagation delay nRD, nA, nB, to nQ Figure 3 CEXT = 0pF REXT = 5K 2.0 2.7 3.0 to 3.6 4.5 to 5.5 1.2 tPHL Propagation delay nRD to nQ (reset) Figure 3 CEXT = 0pF REXT = 5K 2.0 2.7 3.0 to 3.6 4.5 to 5.5 1.2 tPLH Propagation delay nRD to nQ (reset) Figure 3 CEXT = 0pF REXT = 5K 2.0 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Trigger pulse width gg nA = LOW Figure 3 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Trigger pulse width gg nB = HIGH Figure 3 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Reset pulse width nRD = LOW Figure 2 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Output pulse width nQ = HIGH nQ = LOW Q Figures 1, 2 CEXT = 100nF REXT = 10K 2.7 3.0 to 3.6 4.5 to 5.5 2.0 tW Output pulse width nQ = HIGH nQ = LOW Q Figures 1, 2 CEXT = 0 F 0pF REXT = 5K 2.7 3.0 to 3.6 4.5 to 5.5 2.0 trt t Retrigger time gg nA, nB Figure 1 CEXT = 0 F 0pF REXT = 5K 2.7 3.0 to 3.6 4.5 to 5.5 30 25 20 15 30 25 20 15 35 30 25 20 MIN LIMITS -40 to +85C TYP1 120 40 30 252 182 120 40 30 252 182 100 30 23 202 142 100 30 23 202 142 5 3.5 3.02 2.52 13 8 72 52 6 5 42 32 470 460 4502 4302 100 90 802 702 70 55 452 402 ns ns s 57 43 38 31 40 30 25 20 40 30 25 20 45 40 30 25 ns ns ns 68 51 45 36 ns 57 43 38 31 68 51 45 36 ns 76 56 48 40 92 68 57 46 ns 76 56 48 40 92 68 57 46 ns MAX -40 to +125C MIN MAX UNIT
1998 Apr 28
7
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
AC CHARACTERISTICS (Continued)
GND = 0V; tr = tf 2.5ns; CL = 50pF; RL =1 K SYMBOL PARAMETER CONDITION VCC(V) 1.2 2.0 REXT External timing resistor Figure 5 2.7 3.0 to 3.6 4.5 to 5.5 1.2 2.0 CEXT External timing ca acitor capacitor Figure 53 2.7 3.0 to 3.6 4.5 to 5.5 NOTES: 1. Unless otherwise stated, all typical values are at Tamb = 25C. 2. Typical value measured at VCC = 3.3V. 3. Typical value measured at VCC = 5.0V. 4. For other REXT and CEXT combinations see Figure 5. if CEXT > 10 nF, the next formula is valid: tW = K x REXT x CEXT (typ.) where, tW = output pulse width in ns; REXT = external resistor in K; CEXT = external capacitor in pF; K = constant = 0.45 for VCC = 5.0V and 0.48 for VCC = 2.0V. The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is approximately 7 pF. 5. The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be extended when the time between the active-going edges of the trigger pulses meets the minimum retrigger time. If CEXT > 10 pF, the next formula (at VCC = 5.0V) for the set-up time of a retrigger pulse is valid: trt = 30 + 0.19R x C-9 + 13 x R1.05 (typ.) = retrigger time in ns; where, trt CEXT = external capacitor in pF; REXT = external resistor in K. The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is approximately 7 pF. 6. When the device is powered up, initiate the device via a reset pulse, when CEXT < 50pF. No limits pF MIN 10 5 3 2 2 LIMITS -40 to +85C TYP MAX 1000 1000 1000 1000 1000 -40 to +125C MIN MAX UNIT
WAVEFORM
AC WAVEFORMS
VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V; VOL and VOH are the typical output voltage drop that occur with the output load.
nB INPUT tW
nB INPUT
nA INPUT trt tW
nRD INPUT tW
nQ OUTPUT tW tW tW
nQ OUTPUT tW tW
SV00139
SV00140
Figure 1.Output pulse control using retrigger pulse; nRD = HIGH.
Figure 2.Output pulse control using reset input nRD; nA = LOW.
1998 Apr 28
8
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
nB INPUT (nA LOW)
VM
tW
nA INPUT (nB HIGH)
tW
nRD INPUT
VM
tPLH
tPLH
tW
Q OUTPUT
VM
tTLH tW
tTHL
tPHL tW
tPLH
Q OUTPUT
VM
tTHL
tTLH
tPLH
tPHL
SV00197
Figure 3. Input (nA, nB, nRD) to output (nQ, nQ) propagation delays, the output transition times, and the input and output pulse widths.
1998 Apr 28
9
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
APPLICATION INFORMATION
0.8
Power-up considerations
`K' factor
When the monostable is powered-up it may produce an output pulse, with a pulse width defined by the values of RX and CX. This output pulse can be eliminated using the circuit shown in Figure 6.
CX
RX VCC
0.4
nCEXT
nREXT/CEXT
Q A B "123"
Q 0 0 1 2 3 VCC (V) 4 5 6
SV00185
RESET
Figure 4. HCT typical "k" factor as a function of VCC; CX = 10 nF; RX = 10 KW to 100 KW.
VCC
SV00152
106
Figure 6. Power-up output pulse elimination circuit
REXT = 100kW 105 50kW
104 tW ns 103 2kW 10kW
Power-down considerations A large capacitor (CX) may cause problems when powering-down the monostable due to the energy stored in this capacitor. When a system containing this device is powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain damage, due to the capacitor discharging through the input protection diodes. To avoid this possibility, connect a damping diode (DX) preferably a germanium or Schottky type diode able to withstand large current surges as shown in Figure 7.
DX 102
0 1 10 102 CEXT (pF) RX 103 104 CX
VCC
SV00141
nREXT/CEXT
Figure 5.Typical output pulse width as a function of the external capacitor values at VCC = 3.3V and Tamb = 25C.
SV00154
Figure 7. Power-down protection circuit
1998 Apr 28
10
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
TEST CIRCUIT
Vcc
Vl PULSE GENERATOR RT D.U.T.
VO
50pF CL
RL= 1k
Test Circuit for Outputs DEFINITIONS
RL = Load resistor CL = Load capacitance includes jig and probe capacitiance RT = Termination resistance should be equal to ZOUT of pulse generators.
TEST tPLH/tPHL
VCC < 2.7V 2.7-3.6V 4.5 V
VI VCC 2.7V VCC
SV00902
Figure 8. Load circuitry for switching times
1998 Apr 28
11
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
DIP16: plastic dual in-line package; 16 leads (300 mil); long body
SOT38-1
1998 Apr 28
12
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
1998 Apr 28
13
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
1998 Apr 28
14
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
1998 Apr 28
15
Philips Semiconductors
Product specification
Dual retriggerable monostable multivibrator with reset
74LV123
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-04418
Philips Semiconductors
1998 Apr 28 16


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